Performance

RME is a protected-mode microkernel, so the first question is whether it pays for its protection. On microcontrollers, the answer is that it stays in the same range as a bare-metal RTOS while adding capability isolation.

All values below are average CPU cycles on real hardware, with the highest optimisation level (usually -O3, LTO when available). The benchmark is the RME/RVM suite; the in-repo benchmark source implements the thread-switch subset, and the full table is measured through the RVM integration.

Microcontrollers

Chip	Platform	Clock	Flash	RAM	Build	Yield/S	Yield/2	Inv/2	Sig/1	Sig/2	Sig/S	Sig/I
STM32L071CB	Cortex-M0+	32 MHz	128 KB	20 KB	Keil	492	763	956	718	810	749	522
...	...	...	...	...	GCC	513	799	939	736	830	776	534
STM32F405RG	Cortex-M4F	168 MHz	1 MB	192 KB	Keil	324	524	692	576	731	568	420
...	...	...	...	...	GCC	332	520	684	608	735	540	416
STM32F767IG	Cortex-M7F	216 MHz	1 MB	512 KB	Keil	264	400	600	438	484	477	282
...	...	...	...	...	GCC	294	456	644	406	460	429	321
CH32V307VC	RV32IMAFC	144 MHz	128 KB	192 KB	GCC	358	669	706	703	723	624	523

Chip	Yield/S	Inv/2
L071	513	939
F405	332	684
F767*	264	600
V307	358	706

STM32L071CB / F405RG / F767IG / CH32V307 · GCC unless marked · best highlighted

Metric definitions

Metric	Meaning
Yield/S	Intra-process thread yield to itself
Yield/2	Inter-process thread yield, one-way
Inv/2	Inter-process invocation call/return pair
Sig/1	Intra-process signal endpoint send/receive latency
Sig/2	Inter-process signal endpoint send/receive latency
Sig/S	Intra-process signal endpoint send/receive pair
Sig/I	Interrupt signal endpoint send/receive latency

Three numbers that matter

264cycles — intra-process yield on STM32F767IG with Keil

600cycles — inter-process invocation pair on the same board

282cycles — interrupt signal latency on the same board

The protected kernel is generally on par with bare-metal RTOSes on the same silicon. Two system-level numbers follow from that:

• ~3 µs interrupt latency measured on microcontrollers;
• as low as 6% virtualization overhead when RME hosts an RTOS through RVM.

When compared with RT-Linux, the fastest paths are up to 40× better; even including user-level library overhead, the result is still about 25× better. Those comparisons are about context-switch and interrupt response, not throughput on arbitrary workloads.

Microprocessors

The application-processor table is TBD. The project has ports and project scaffolding for ARMv7-A, RV64 and x86-64, but it does not publish measured numbers for them yet:

Chip	Platform	Cores	Yield/S	Yield/2	Inv/2	Sig/2
F1C100S	ARM926EJ-S	1	TBD	TBD	TBD	TBD

The x86-64 project is explicitly not a bootable distribution today. Treat the MPU side as research and bring-up work, not a performance claim.

Reading the numbers correctly

• These are average-case cycles. The kernel is designed for bounded worst-case behaviour; average numbers alone do not describe a real-time system.
• Toolchains differ. The bold row is Keil on the STM32F767IG; the other rows use their listed compiler. Do not compare across compilers without noting that difference.
• Yield/S for a single-threaded test is a microbenchmark, not an application throughput result.
• No MPU (microprocessor) number is published as measured, because it is not.